clocks
This commit is contained in:
@@ -15,12 +15,20 @@ namespace CompuLogic.Workspace.Gates
|
||||
|
||||
#endregion
|
||||
|
||||
#region 100 - Special
|
||||
#region 100 - I/O
|
||||
|
||||
internal class INGate : NoneGate { }
|
||||
|
||||
internal class OUTGate : NoneGate { }
|
||||
|
||||
internal class CLK1Gate : NoneGate { }
|
||||
|
||||
internal class CLK2Gate : NoneGate { }
|
||||
|
||||
internal class CLK3Gate : NoneGate { }
|
||||
|
||||
internal class CLK4Gate : NoneGate { }
|
||||
|
||||
#endregion
|
||||
|
||||
#region 200 - Basic
|
||||
|
||||
@@ -7,6 +7,10 @@
|
||||
// 100 - I/O
|
||||
IN = 100,
|
||||
OUT = 110,
|
||||
CLK1 = 120,
|
||||
CLK2 = 130,
|
||||
CLK3 = 140,
|
||||
CLK4 = 150,
|
||||
// 200 - Basic
|
||||
BUF = 200,
|
||||
AND = 210,
|
||||
|
||||
Reference in New Issue
Block a user