more gates definition

This commit is contained in:
klemek
2020-12-17 19:46:43 +01:00
parent 9ea26d2563
commit 7208a9ebad
3 changed files with 118 additions and 50 deletions
@@ -27,17 +27,9 @@ namespace UntitledLogicGame.Workspace.Gates
Definitions = new Dictionary<GateType, GateDefinition>();
foreach (var gateType in Enum.GetValues(typeof(GateType)).Cast<GateType>())
{
try
{
var t = Type.GetType($"{typeof(GateDefinition).Namespace}.{gateType}Gate", true);
Definitions[gateType] = (GateDefinition)t.GetConstructor(new Type[0]).Invoke(new object[0]);
Definitions[gateType].Name = gateType.ToString();
}
catch
{
Definitions[gateType] = (GateDefinition)typeof(NoneGate).GetConstructor(new Type[0]).Invoke(new object[0]);
Definitions[gateType].Name = gateType.ToString();
}
var t = Type.GetType($"{typeof(GateDefinition).Namespace}.{gateType}Gate", true);
Definitions[gateType] = (GateDefinition)t.GetConstructor(new Type[0]).Invoke(new object[0]);
Definitions[gateType].Name = gateType.ToString();
}
}
@@ -17,11 +17,15 @@ namespace UntitledLogicGame.Workspace.Gates
#region 100 - Special
internal class INGate : NoneGate { }
internal class OUTGate : NoneGate { }
#endregion
#region 200 - Basic
internal class BufferGate : GateDefinition
internal class BUFGate : GateDefinition
{
public override string[] Inputs { get; } = new string[] { "A" };
public override string[] Outputs { get; } = new string[] { "Q" };
@@ -53,10 +57,6 @@ namespace UntitledLogicGame.Workspace.Gates
internal override Func<InputState, OutputState> Function => (input) => new OutputState(input[0] ^ input[1]);
}
#endregion
#region 300 - Inverted Basic
internal class NOTGate : GateDefinition
{
public override string[] Inputs { get; } = new string[] { "A" };
@@ -91,7 +91,7 @@ namespace UntitledLogicGame.Workspace.Gates
#endregion
#region 400 - Latches
#region 300 - Latches
internal class SRLatchGate : StateGateDefinition
{
@@ -155,7 +155,7 @@ namespace UntitledLogicGame.Workspace.Gates
#endregion
#region 500 - Flip-Flops
#region 400 - Flip-Flops
internal class SRFlipFlopGate : StateGateDefinition
{
@@ -250,7 +250,7 @@ namespace UntitledLogicGame.Workspace.Gates
#endregion
#region 600 - Arithmetic
#region 500 - Arithmetic
internal class HalfAddGate : GateDefinition
{
@@ -330,7 +330,7 @@ namespace UntitledLogicGame.Workspace.Gates
#endregion
#region 700 - Data
#region 600 - Data
internal class MuxGate : GateDefinition
{
@@ -459,7 +459,7 @@ namespace UntitledLogicGame.Workspace.Gates
#endregion
#region 800 - Registers
#region 700 - Registers
internal class SISO4bGate : StateGateDefinition
{
@@ -549,4 +549,78 @@ namespace UntitledLogicGame.Workspace.Gates
}
#endregion
#region 800 - Counters
internal class Counter2bGate : StateGateDefinition
{
public new string Name => "2bits Count.";
public override string[] Inputs { get; } = new string[] { "CLK", "RST" };
public override string[] Outputs { get; } = new string[] { "Q₀", "Q₁" };
private bool _q0;
private bool _q1;
private bool _lastClk;
internal override Func<InputState, OutputState> Function => (input) =>
{
var clk = input[0];
var rst = input[1];
if (clk && !_lastClk) // rising edge
{
if (rst)
{
_q0 = false;
_q1 = false;
}
else
{
_q1 = _q0 ^ _q1;
_q0 = !_q0;
}
}
_lastClk = clk;
return new OutputState(_q0, _q1);
};
}
internal class Counter4bGate : StateGateDefinition
{
public new string Name => "4bits Count.";
public override string[] Inputs { get; } = new string[] { "CLK", "RST" };
public override string[] Outputs { get; } = new string[] { "Q₀", "Q₁", "Q₂", "Q₃" };
private bool _q0;
private bool _q1;
private bool _q2;
private bool _q3;
private bool _lastClk;
internal override Func<InputState, OutputState> Function => (input) =>
{
var clk = input[0];
var rst = input[1];
if (clk && !_lastClk) // rising edge
{
if (rst)
{
_q0 = false;
_q1 = false;
_q2 = false;
_q3 = false;
}
else
{
_q3 = (_q3 || _q2 && _q1 && _q0) && (!_q3 && !_q2 && !_q1 && !_q0);
_q2 = (_q2 || _q1 && _q0) && (!_q2 && !_q1 && !_q0);
_q1 = _q0 ^ _q1;
_q0 = !_q0;
}
}
_lastClk = clk;
return new OutputState(_q0, _q1, _q2, _q3);
};
}
#endregion
}
+31 -29
View File
@@ -12,35 +12,37 @@
AND = 210,
OR = 220,
XOR = 230,
// 300 - Inverted Basic
NOT = 300,
NAND = 310,
NOR = 320,
XNOR = 330,
// 400 - Latches
SRLatch = 400,
JKLatch = 410,
DLatch = 420,
NOT = 240,
NAND = 250,
NOR = 260,
XNOR = 270,
// 300 - Latches
SRLatch = 300,
JKLatch = 310,
DLatch = 320,
// 500 - Flip-Flops
SRFlipFlop = 500,
JKFlipFlop = 510,
DFlipFlop = 520,
TFlipFlop = 530,
// 600 - Arithmetic
HalfAdd = 600,
FullAdd = 610,
HalSub = 620,
FullSub = 630,
// 700 - Data
Mux = 710,
Demux = 720,
Mux2b = 730,
Demux2b = 740,
Enc2b4b = 750,
Dec4b2b = 760,
// 800 - Registers
SISO4b = 800,
SIPO4b = 810,
PIPO4b = 820,
SRFlipFlop = 400,
JKFlipFlop = 410,
DFlipFlop = 420,
TFlipFlop = 430,
// 500 - Arithmetic
HalfAdd = 500,
FullAdd = 510,
HalSub = 520,
FullSub = 530,
// 600 - Data
Mux = 610,
Demux = 620,
Mux2b = 630,
Demux2b = 640,
Enc2b4b = 650,
Dec4b2b = 660,
// 700 - Registers
SISO4b = 700,
SIPO4b = 710,
PIPO4b = 720,
// 800 - Counters
Counter2b = 800,
Counter4b = 810
}
}